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AMD's dedicated video decoding ASIC
Unified Video Decoder (UVD, previously called Universal Video Decoder) is the name given to AMD's dedicated video decoding ASIC. There are multiple versions
Unified_Video_Decoder
Royalty-free application programming interface and free and open-source library
on graphics processing units (GPU), such as Nvidia's PureVideo or AMD's Unified Video Decoder and make use of it. VDPAU is targeted at Unix-like operating
VDPAU
AMD hardware video codec, built into AMD GPUs and APUs
successor to both the Unified Video Decoder and Video Coding Engine designs, which are hardware accelerators for video decoding and encoding, respectively
Video_Core_Next
Video encoding and decoding hardware by Intel
Quick Sync. Video Core Next – AMD's current equivalent SIP core (since 2018) Unified Video Decoder – AMD's decoding SIP core (until 2017) Video Coding Engine
Intel_Quick_Sync_Video
Arbitrary extension of the X video extension
XvBA Video Acceleration API (VA API) - is an open source software library with XvBA backend support UVD (Unified Video Decoder) - is the video decoding unit
X-Video Bitstream Acceleration
X-Video_Bitstream_Acceleration
AMD hardware accelerator for encoding MP4 H.264 videos, built into AMD GPU's
confused with AMD's Unified Video Decoder (UVD). As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN). The
Video_Coding_Engine
Topics referred to by the same term
cocktail Advanced Media Framework, AMD's video acceleration technologies including Unified Video Decoder and Video Coding Engine Against Malaria Foundation
AMF
Series of microarchitectures and instruction set architecture by AMD
Including but not limited to the Unified Video Decoder, Video Coding Engine, and AMD TrueAudio. The Video Coding Engine is a video encoding ASIC, first introduced
Graphics_Core_Next
Specialized electronic circuit that accelerates graphics
with DXVA. SoC UVD (Unified Video Decoder) – the video decoding bit-stream technology from ATI to support hardware (GPU) decode with DXVA OpenGL API OpenCL
Graphics_processing_unit
API for hardware video acceleration
AMD Unified Video Decoder Distributed Codec Engine Intel Clear Video Media Foundation Nvidia PureVideo OpenMAX VDPAU Video Acceleration API X-Video Bitstream
DirectX_Video_Acceleration
Nvidia's hardware SIP core that performs video decoding
High-Definition Video Processor - GeForce 2. Video Processing Engine NVENC NVDEC Video Core Next - AMD Unified Video Decoder - AMD Video Shader - ATI Quick
Nvidia_PureVideo
Set of hardware and low level software features
a player and decoder software that support ATI Avivo is used. ATI Avivo has been long superseded by Unified Video Decoder (UVD) and Video Coding Engine
ATI_Avivo
Uses of bit stream decoders (BSD): Graphics processing unit (GPU) H.264/MPEG-4 AVC Unified Video Decoder (UVD) – the video decoding bit-stream technology
Bitstream_format
Feature in Nvidia graphics cards
equivalent SIP core since 2018 AMD Unified Video Decoder, AMD's equivalent SIP core up to 2017 Intel Quick Sync Video, Intel's equivalent SIP core List
NVDEC
Computer graphics processing technology
Scaling Alpha Blending Colorspace Conversion Run-Level Decode & De-ZigZag Unified Video Decoder (UVD) Video Coding Engine (VCE) "About AMD". Ati.amd.com. Archived
Video_Immersion
Hardware SIP core that performs video decoding
renderers filters. Nvidia PureVideo AMD Unified Video Decoder Intel Quick Sync Video Amlogic Video Engine Xilleon VideoCore "Featured Product - Crystal
Broadcom_Crystal_HD
"Radeon Feature - Radeon UVD (Unified Video Decoder) Hardware". X.org Foundation. "Radeon Feature - Radeon VCE (Video Compression Engine) Hardware".
List of AMD graphics processing units
List_of_AMD_graphics_processing_units
Algorithm for modelling sequential data
transformer designs are commonly grouped into encoder-only, decoder-only, and encoder-decoder variants, depending on whether they are optimized for representation
Transformer_(deep_learning)
Series of video cards
The encoding stack has changed from using Unified Video Decoder and Video Coding Engine, to using Video Core Next. VCN was previously used in the GCN
Radeon_RX_5000_series
Codename for a family of graphics processing unit microarchitectures
unified shader model following Xenos. TeraScale replaced the old fixed-pipeline microarchitectures and competed directly with Nvidia's first unified shader
TeraScale_(microarchitecture)
Feature of GPUs by Nvidia
encoding video streams became the baseline. Nvidia chips also feature an onboard decoder, NVDEC (short for Nvidia Decoder), to offload video decoding from
NVENC
Series of microprocessors by AMD
partitioned between the GPU (up to 512 MB) and the CPU (the remainder). Unified Video Decoder (UVD) The AMD Brazos platform was introduced on 4 January 2011,
AMD_APU
Series of video cards
output, and HDMI output is capable of 12-bit per component output. Unified Video Decoder (UVD2.2) is present on the dies of all products and supported by
Radeon_HD_5000_series
Free and open-source library for 3D graphics rendering
brands for their ASICs, such as PureVideo (Nvidia), Unified Video Decoder (AMD), Video Coding Engine (AMD), Quick Sync Video (Intel), DaVinci (Texas Instruments)
Mesa_(computer_graphics)
Device driver and utility software package for AMD GPUs and APUs
controllers as well as their SIP blocks for video decoding (Unified Video Decoder [UVD]) and video encoding (Video Coding Engine [VCE]). The device driver
AMD_Software
on newer CPUs Nvidia PureVideo Unified Video Decoder (UVD) Video Coding Engine (VCE) "Intel's Sandy Bridge Celerons video features fused off". March 21
Intel_Clear_Video
Graphics card feature
also listed. Video Shader has been superseded by Unified Video Decoder (UVD) and Video Coding Engine (VCE). Unified Video Decoder (UVD) Video Coding Engine
Video_Shader
Brand of computer products
also to be found on certain models in the Radeon products line: Unified Video Decoder, Video Coding Engine and TrueAudio. The brand was previously only known
Radeon
Architecture-enabled zero-copy through pointer passing. SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio. Dual-channel (2× 64 Bit) DDR3 memory
List of AMD processors with 3D graphics
List_of_AMD_processors_with_3D_graphics
American multinational semiconductor company
multiple GPUs Unified Video Decoder (UVD) – acceleration of video decompression (decoding) Video Coding Engine (VCE) – acceleration of video compression
AMD
Series of video cards
series and have been present in all products since. Both Unified Video Decoder (UVD) and Video Coding Engine (VCE) are present on the dies of all products
Radeon_HD_7000_series
Series of video cards
GCN 2nd gen and later products. AMD's SIP core for video acceleration, Unified Video Decoder and Video Coding Engine, are found on all GPUs and are supported
Radeon_300_series
Microarchitecture by AMD
AMD Heterogeneous System Architecture (HSA) 2.0 SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio Three to eight Compute Units (CUs) based
Steamroller (microarchitecture)
Steamroller_(microarchitecture)
Series of chipsets by AMD
880G and the 890GX have integrated graphics (IGP) that support hardware video playback acceleration at different levels. The IGP features are listed below:
AMD_800_chipset_series
AMD's application-specific integrated circuit
computation of audio effects Yamaha DSP-1 FMOD – middleware for audio Unified Video Decoder Video Coding Engine "Everything You Wanted to Know About AMD TrueAudio"
AMD_TrueAudio
List of computer file compression formats
Media Encoder FFmpeg (decoder only) Other DTS-HD Master Audio, also known as DTS++ and DCA XLL libdca (decoder only) FFmpeg (decoder only) Dolby TrueHD –
List_of_codecs
Series of video cards
which implements TeraScale 1, ATI's first Unified shader model microarchitecture for PCs. The Unified Video Decoder (UVD) SIP core is on-die in the HD 2400
Radeon_HD_2000_series
Series of video cards
of this series contain a GPU which implements TeraScale 1. The Unified Video Decoder (UVD) SIP core is present on the dies of the GPUs used in the HD
Radeon_HD_3000_series
Series of video cards
Radeon HD 5000 series and have been present in all products since. Unified Video Decoder (UVD3) is present on the die of all products and supported by AMD
Radeon_HD_6000_series
Series of video cards
the dies of GCN 2/3 products. AMD's SIP core for video acceleration, Unified Video Decoder and Video Coding Engine, are found on all GPUs and supported
Radeon_200_series
Family of GPUs by AMD
series and have been present on all chips since then. Both Unified Video Decoder (UVD) and Video Coding Engine (VCE) are present on all GCN-based chips (starting
Radeon_HD_8000_series
GPU. UVD (Unified Video Decoder) - the bit-stream technology from ATI Technologies used in their graphics chips to accelerate video decoding on hardware
OpenMAX
Brand of a system on a chip
AVIVO, named as Unified Video Decoder (UVD) was based on Xilleon video processor to provide hardware decoding of H.264, and VC-1 video codec standards
Xilleon
Software that controls computer-graphics hardware
feature matrix is available, and there is support for Video Coding Engine and Unified Video Decoder. The free and open-source Radeon graphics device drivers
Free and open-source graphics device driver
Free_and_open-source_graphics_device_driver
Extension of the X video extension
XvMC API allows video programs to offload portions of the video decoding process to the GPU video-hardware. In theory this process should also reduce bus
X-Video_Motion_Compensation
2018 open and royalty-free video coding format
switched from Libaom to dav1d as a default decoder in May 2019. In 2019, dav1d v0.5 was rated the best decoder in comparison to libgav1 and libaom. Cisco
AV1
Machine learning model for speech
connections). The encoder's output is layer normalized. The decoder is a standard transformer decoder. It has the same width and Transformer blocks as the encoder
Whisper (speech recognition system)
Whisper_(speech_recognition_system)
Foundation model allowing control of robot actions
description into a distribution within a latent space, with an action decoder that transforms this representation into continuous output actions, directly
Vision–language–action_model
PureVideo - the bit-stream technology from NVIDIA used in their graphics chips to accelerate video decoding on hardware GPU. UVD (Unified Video Decoder)
Distributed_Codec_Engine
Video Acceleration High-Definition Video Processor Intel Clear Video Intel Quick Sync Video Nvidia PureVideo Nvidia NVDEC Unified Video Decoder Video
Codec_acceleration
GPU microarchitecture by Nvidia
eight to ten times performance increase in PureVideo Feature Set E video decoding due to the video decoder cache, paired with increases in memory efficiency
Maxwell_(microarchitecture)
Audio compression standard
USAC profile. As a result, a decoder built according to the Extended High Efficiency AAC profile is able to also decode the bit streams created for the
Unified Speech and Audio Coding
Unified_Speech_and_Audio_Coding
Series of large language models developed by Google AI
Transformer model, T5 models are encoder-decoder Transformers, where the encoder processes the input text, and the decoder generates the output text. T5 models
T5_(language_model)
Parallel computing platform and programming model
custom linear algebra algorithms, NVIDIA Video Decoder was deprecated in CUDA 9.2; it is now available in NVIDIA Video Codec SDK CUDA 10 comes with these other
CUDA
Nvidia microarchitecture
Vertex and pixel shaders GeForce 3 4 Ti FX 6 7 Unified shaders GeForce 8 9 100 200 300 400 500 Unified shaders & NUMA GeForce 600 700 800M 900 10 16 Ray
Rubin_(microarchitecture)
Arm-based system-on-chip by Nvidia
support for up to 128 GB of unified memory. Microsoft stated that Windows on RTX Spark includes optimizations for unified memory, workload profile scheduling
Nvidia_RTX_Spark
Analog videocassette recording format
non-Hi-Fi VCRs that are not equipped with the matching Dolby Noise Reduction decoder, although this may actually improve the sound quality of non-Hi-Fi VCRs
VHS
Video-upscaling feature
RTX Video Super Resolution (RTX VSR) is a video scaling feature by Nvidia. It was released on February 28, 2023. The feature was first unveiled during
Video_Super_Resolution
Series of GPUs by Nvidia
architecture developed by Nvidia, Tesla represents the company's first unified shader architecture. All GeForce 8 Series products are based on Tesla.
GeForce_8_series
Taiwanese and American businessman (born 1963)
เข้าพบนายกรัฐมนตรี. Retrieved December 4, 2024 – via YouTube. (At 0:27.) This is a video released by the Government of Thailand of a conversation between Huang and
Jensen_Huang
Application programming interface for multimedia playback
Retrieved 2010-04-18. "H.264 Video Decoder". Archived from the original on 2010-04-21. Retrieved 2010-04-18. "AAC Decoder". Archived from the original
Media_Foundation
Series of GPUs by Nvidia
an 8 to 10 times performance increase in PureVideo Feature Set E video decoding due to the video decoder cache paired with increases in memory efficiency
GeForce_900_series
Type of artificial intelligence system
systems used an encoder-decoder architecture, where an encoder summarized images into feature vectors, which were fed to a decoder to generate the associated
Vision–language_model
Development platform for rendering graphics
product design, scientific visualization, energy exploration, and film and video production (especially under the RTX PRO and formerly Quadro RTX brands)
Nvidia_RTX
GPU microarchitecture by Nvidia
architecture utilizes the new 8th generation Nvidia NVENC video encoder and the 5th generation NVDEC video decoder introduced by Ampere returns. NVENC AV1 hardware
Ada Lovelace (microarchitecture)
Ada_Lovelace_(microarchitecture)
Graphics Chip by Nvidia
allowed the user to run software that used 3dfx's Glide. This wrapper, named Unified, was not as compatible with Glide games as real 3dfx hardware, but it was
RIVA_TNT2
Video compression standard
sense that basic "baseline" H.263 bitstreams are correctly decoded by an MPEG-4 Video decoder. The next enhanced format developed by ITU-T VCEG (in partnership
H.263
Nvidia microarchitecture
Vertex and pixel shaders GeForce 3 4 Ti FX 6 7 Unified shaders GeForce 8 9 100 200 300 400 500 Unified shaders & NUMA GeForce 600 700 800M 900 10 16 Ray
Feynman_(microarchitecture)
Machine learning model
competitor Gen-3 Alpha now available". THE DECODER. Retrieved 18 November 2024. "Generative AI's Next Frontier Is Video". Bloomberg.com. 20 March 2023. Retrieved
Text-to-video_model
Series of GPUs by Nvidia
an 8 to 10 times performance increase in PureVideo Feature Set E video decoding due to the video decoder cache paired with increases in memory efficiency
GeForce_800M_series
Sound format
4-channel decoder could simply send the sum signal (L+R) to the center speaker, and the difference signal (L-R) to the surrounds. But such a decoder would
Dolby_Stereo
Series of GPUs by Nvidia
40nm GPUs feature the new PureVideo HD VP4 decoder hardware in them, as the older GeForce 8 and 9 GPUs only have PureVideo HD VP2 or VP3 (G98). They also
GeForce_200_series
American electrical engineer (born 1959)
Vertex and pixel shaders GeForce 3 4 Ti FX 6 7 Unified shaders GeForce 8 9 100 200 300 400 500 Unified shaders & NUMA GeForce 600 700 800M 900 10 16 Ray
Chris_Malachowsky
System-on-a-chip series designed by Apple Inc.
(CPU), graphics processing unit (GPU), neural processing unit (NPU), and unified memory on a single package. The base M5 was announced on October 15, 2025
Apple_M5
GPU microarchitecture by Nvidia
2 HDMI 1.4a 4K x 2K video output PureVideo VP5 hardware video acceleration (up to 4K x 2K H.264 decode) Hardware H.265 decoding Hardware H.264 encoding
Kepler_(microarchitecture)
Realtime physics engine software
developed by Nvidia as part of the Nvidia GameWorks software suite. Initially, video games supporting PhysX were meant to be accelerated by PhysX PPU (expansion
PhysX
Series of GPUs by Nvidia
subsection of the Pascal architecture article. Lacks hardware video encoder and decoder Due to production problems surrounding the RTX 30-series cards
GeForce_10_series
(GPU), as well as other components such as a memory controller and video decoder/encoder. The console also includes secondary custom chips that handle
PlayStation 4 technical specifications
PlayStation_4_technical_specifications
Series of GPUs by Nvidia
encoder and sixth-generation NVDEC video decoder. For the first time in a consumer GeForce GPU, encoding and decoding video in the 4:2:2 color format for professional-grade
GeForce_RTX_50_series
Series of GPUs by Nvidia
performance. Eighth-generation NVENC encoder and fifth-generation NVDEC video decoder, with high-end cards using 2 encoders. The RTX 4090 was released as
GeForce_RTX_40_series
Series of GPUs by Nvidia
and PCI-Express 2.0 Supports 2nd generation PureVideo HD technology with partial VC1 decoding 1 Unified shaders : Texture mapping units : Render output
GeForce_9_series
Television transmitted over a computer network
a point-to-point unicast connection is set up between the customer's decoder (set-top box or PC) and the delivering streaming server. The signalling
Internet_Protocol_television
GPU by Nvidia
lighting (T&L) engine, and adding hardware motion compensation for MPEG-2 video. It offered a notable leap in 3D PC gaming performance and was the first
GeForce_256
Series of integrated graphics processors
2 support New features: HDMI 2.0 support, VP9 10-bit Profile2 hardware decoder New features: 10 nm Gen 11 GPU microarchitecture, two HEVC 10-bit encode
Intel_Graphics_Technology
Series of graphics cards by AMD
operation. Unified shaders : Texture mapping units : Render output units and Compute units (CU) Lacks hardware video encoder and decoder GlobalFoundries'
Radeon_500_series
Nvidia family of AI foundation models
Nemotron-4 15B Technical Report, describing a 15-billion-parameter multilingual decoder-only Transformer model trained on 8 trillion tokens. In June 2024, Nvidia
Nemotron
Brand by Nvidia
life of the subscription, being delivered to subscribers through streaming video. Certain titles were also available via a "Buy & Play" model. This version
GeForce_Now
GPU microarchitecture by AMD released in 2020
operation. Unified shaders : Texture mapping units : Render output units : Ray accelerators and Compute units (CU) Navi 24 lacks hardware video encoder.
RDNA_2
Series of GPUs by Nvidia
users led the user community to conclude that the WMV9 decoder component of the AGP 6800's PureVideo unit is either non-functional or intentionally disabled
GeForce_6_series
GPU microarchitecture designed by Nvidia
Blackwell "B100" to feature 2 dies and 192GB of HBM3e memory, B200 with 288GB". VideoCardz. March 17, 2024. Retrieved March 24, 2024. "Nvidia GeForce RTX 5090
Blackwell_(microarchitecture)
GPU microarchitecture by Nvidia
consumer GeForce cards are artificially capped to 1/8. L1 cache per SM and unified L2 cache that services all operations (load, store and texture).[citation
Fermi_(microarchitecture)
Encoding for a sequence of byte values using 64 printable characters
the encoding alphabet or without padding, and it also declares that a decoder must reject data that contain characters other than the encoding alphabet
Base64
Hardware-accelerated screen recording utility
configured to record a continuous buffer, allowing the user to save the video retroactively. ShadowPlay is supported for any Nvidia GTX 600 series card
Nvidia_ShadowPlay
Middleware software suite by Nvidia
Vertex and pixel shaders GeForce 3 4 Ti FX 6 7 Unified shaders GeForce 8 9 100 200 300 400 500 Unified shaders & NUMA GeForce 600 700 800M 900 10 16 Ray
Nvidia_GameWorks
Indian instant payment system
Unified Payments Interface (UPI) is an Indian instant payment system and protocol developed by the National Payments Corporation of India (NPCI) in April
Unified_Payments_Interface
Video codec
using a SW-based decoder, even had 4K and 8K resolutions, without the mandatory need to resort to HW-assisted decoding support. HW decoders are frequently
DNxHR_codec
Real-time graphics collaboration platform
Vertex and pixel shaders GeForce 3 4 Ti FX 6 7 Unified shaders GeForce 8 9 100 200 300 400 500 Unified shaders & NUMA GeForce 600 700 800M 900 10 16 Ray
Nvidia_Omniverse
AI accelerator by Nvidia
Vertex and pixel shaders GeForce 3 4 Ti FX 6 7 Unified shaders GeForce 8 9 100 200 300 400 500 Unified shaders & NUMA GeForce 600 700 800M 900 10 16 Ray
NVDLA
Family of large language models by Google
2026 and features a unified multimodal architecture that processes images and audio without encoders. Gemma 3 is based on a decoder-only transformer architecture
Gemma_(language_model)
Brand of GPUs by Nvidia
Interface) and PureVideo capability (integrated partial hardware MPEG-2, VC-1, Windows Media Video, and H.264 decoding and fully accelerated video post-processing)
GeForce
UNIFIED VIDEO-DECODER
UNIFIED VIDEO-DECODER
Boy/Male
Tamil
Virikt | விரீகà¯à®¤
Purified
Virikt | விரீகà¯à®¤
Girl/Female
Latin
Purified.
Boy/Male
American, British, English, French, Portuguese, Spanish
Life; Used as Both Surname and Given Name; Life Giving
Girl/Female
Latin
Purified.
Girl/Female
Latin
Purified.
Boy/Male
Hindu
Purified
Girl/Female
Latin
Purified.
Boy/Male
Gujarati, Hindu, Indian, Jain, Kannada, Malayalam, Marathi
Without Form
Girl/Female
Hindu, Indian
Purified
Girl/Female
Tamil
Lavenia | லாவேநியா
Purified
Lavenia | லாவேநியா
Boy/Male
Hebrew
United.
Boy/Male
Indian, Sanskrit
Purified
Male
Japanese
(英夫) Japanese name HIDEO means "splendid man."
Girl/Female
Tamil
Laveenia | லவிநியாÂ
Purified
Laveenia | லவிநியாÂ
Girl/Female
Indian, Telugu
Purified
Girl/Female
Hindu
Purified
Boy/Male
Hindu, Indian
Fulfilment
Boy/Male
English French Portuguese Spanish
Life. Used as both surname and given name. See also Vito.
Girl/Female
Bengali, Gujarati, Hindu, Indian, Kannada, Latin, Malayalam, Marathi, Telugu
Purified
Boy/Male
Hebrew
United.
UNIFIED VIDEO-DECODER
UNIFIED VIDEO-DECODER
Boy/Male
Hindu, Indian, Kannada, Malayalam, Marathi, Telugu
Lord Krishna
Girl/Female
Arabic, Muslim
One with Long Eye Lashes
Girl/Female
Arabic, Muslim
Successful
Girl/Female
Gaelic
Polished chief.
Boy/Male
Hindu, Indian, Marathi
Well Praised
Boy/Male
Indian, Sanskrit
Truthful
Girl/Female
Tamil
Triambika | தà¯à®°à®¿à®‚பிகா
Goddess Parvati
Girl/Female
Arabic, Muslim
Angel; Heavens; Light
Boy/Male
Danish, English, Finnish, Swedish
Powerful in the Law; Good Worship; Boar Battle; Law-powerful
Boy/Male
Australian, British, English
He who is in Charge
UNIFIED VIDEO-DECODER
UNIFIED VIDEO-DECODER
UNIFIED VIDEO-DECODER
UNIFIED VIDEO-DECODER
UNIFIED VIDEO-DECODER
imp. & p. p.
of Unitize
imp. & p. p.
of Minify
a.
Not pitied.
n.
Any one of numerous species of American singing birds belonging to Vireo and allied genera of the family Vireonidae. In many of the species the back is greenish, or olive-colored. Called also greenlet.
imp. & p. p.
of Ignify
a.
Not defiled; pure.
pl.
of Unity
imp. & p. p.
of Purify
n.
An ideo-motor movement.
imp. & p. p.
of Unify
a.
Being without gifts, especially native gifts or endowments.
imp. & p. p.
of Sniff
n.
A vireo (Vireo altiloquus) native of the West Indies and Florida; -- called also black-whiskered vireo.
n.
l. (Zool.) One of numerous species of small American singing birds, of the genus Vireo, as the solitary, or blue-headed (Vireo solitarius); the brotherly-love (V. Philadelphicus); the warbling greenlet (V. gilvus); the yellow-throated greenlet (V. flavifrons) and others. See Vireo.
a.
Pitiless; merciless.
n.
One who, or that which, unifies; as, a natural law is a unifier of phenomena.
imp. & p. p.
of Snift
a.
Undefiled.